early-access version 2752
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72f6c8b5ab
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3 changed files with 88 additions and 11 deletions
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@ -1,7 +1,7 @@
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yuzu emulator early access
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yuzu emulator early access
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=============
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=============
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This is the source code for early-access 2751.
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This is the source code for early-access 2752.
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## Legal Notice
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## Legal Notice
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@ -46,6 +46,7 @@ std::string GDBStubA64::GetTargetXML() const {
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R"(<?xml version="1.0"?>
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R"(<?xml version="1.0"?>
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<!DOCTYPE target SYSTEM "gdb-target.dtd">
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<!DOCTYPE target SYSTEM "gdb-target.dtd">
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<target version="1.0">
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<target version="1.0">
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<architecture>aarch64</architecture>
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<feature name="org.gnu.gdb.aarch64.core">
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<feature name="org.gnu.gdb.aarch64.core">
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<reg name="x0" bitsize="64"/>
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<reg name="x0" bitsize="64"/>
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<reg name="x1" bitsize="64"/>
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<reg name="x1" bitsize="64"/>
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@ -80,7 +81,7 @@ std::string GDBStubA64::GetTargetXML() const {
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<reg name="x30" bitsize="64"/>
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<reg name="x30" bitsize="64"/>
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<reg name="sp" bitsize="64" type="data_ptr"/>
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<reg name="sp" bitsize="64" type="data_ptr"/>
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<reg name="pc" bitsize="64" type="code_ptr"/>
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<reg name="pc" bitsize="64" type="code_ptr"/>
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<flags id="pstate_flags" size="4">
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<flags id="cpsr_flags" size="4">
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<field name="SP" start="0" end="0"/>
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<field name="SP" start="0" end="0"/>
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<field name="" start="1" end="1"/>
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<field name="" start="1" end="1"/>
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<field name="EL" start="2" end="3"/>
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<field name="EL" start="2" end="3"/>
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@ -97,9 +98,84 @@ std::string GDBStubA64::GetTargetXML() const {
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<field name="Z" start="30" end="30"/>
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<field name="Z" start="30" end="30"/>
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<field name="N" start="31" end="31"/>
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<field name="N" start="31" end="31"/>
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</flags>
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</flags>
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<reg name="pstate" bitsize="32" type="pstate_flags"/>
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<reg name="cpsr" bitsize="32" type="cpsr_flags"/>
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</feature>
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</feature>
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<feature name="org.gnu.gdb.aarch64.fpu">
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<feature name="org.gnu.gdb.aarch64.fpu">
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<vector id="v2d" type="ieee_double" count="2"/>
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<vector id="v2u" type="uint64" count="2"/>
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<vector id="v2i" type="int64" count="2"/>
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<vector id="v4f" type="ieee_single" count="4"/>
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<vector id="v4u" type="uint32" count="4"/>
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<vector id="v4i" type="int32" count="4"/>
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<vector id="v8u" type="uint16" count="8"/>
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<vector id="v8i" type="int16" count="8"/>
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<vector id="v16u" type="uint8" count="16"/>
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<vector id="v16i" type="int8" count="16"/>
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<vector id="v1u" type="uint128" count="1"/>
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<vector id="v1i" type="int128" count="1"/>
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<union id="vnd">
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<field name="f" type="v2d"/>
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<field name="u" type="v2u"/>
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<field name="s" type="v2i"/>
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</union>
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<union id="vns">
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<field name="f" type="v4f"/>
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<field name="u" type="v4u"/>
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<field name="s" type="v4i"/>
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</union>
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<union id="vnh">
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<field name="u" type="v8u"/>
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<field name="s" type="v8i"/>
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</union>
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<union id="vnb">
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<field name="u" type="v16u"/>
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<field name="s" type="v16i"/>
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</union>
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<union id="vnq">
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<field name="u" type="v1u"/>
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<field name="s" type="v1i"/>
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</union>
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<union id="aarch64v">
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<field name="d" type="vnd"/>
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<field name="s" type="vns"/>
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<field name="h" type="vnh"/>
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<field name="b" type="vnb"/>
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<field name="q" type="vnq"/>
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</union>
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<reg name="v0" bitsize="128" type="aarch64v" regnum="34"/>
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<reg name="v1" bitsize="128" type="aarch64v" />
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<reg name="v2" bitsize="128" type="aarch64v" />
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<reg name="v3" bitsize="128" type="aarch64v" />
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<reg name="v4" bitsize="128" type="aarch64v" />
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<reg name="v5" bitsize="128" type="aarch64v" />
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<reg name="v6" bitsize="128" type="aarch64v" />
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<reg name="v7" bitsize="128" type="aarch64v" />
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<reg name="v8" bitsize="128" type="aarch64v" />
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<reg name="v9" bitsize="128" type="aarch64v" />
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<reg name="v10" bitsize="128" type="aarch64v"/>
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<reg name="v11" bitsize="128" type="aarch64v"/>
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<reg name="v12" bitsize="128" type="aarch64v"/>
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<reg name="v13" bitsize="128" type="aarch64v"/>
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<reg name="v14" bitsize="128" type="aarch64v"/>
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<reg name="v15" bitsize="128" type="aarch64v"/>
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<reg name="v16" bitsize="128" type="aarch64v"/>
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<reg name="v17" bitsize="128" type="aarch64v"/>
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<reg name="v18" bitsize="128" type="aarch64v"/>
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<reg name="v19" bitsize="128" type="aarch64v"/>
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<reg name="v20" bitsize="128" type="aarch64v"/>
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<reg name="v21" bitsize="128" type="aarch64v"/>
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<reg name="v22" bitsize="128" type="aarch64v"/>
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<reg name="v23" bitsize="128" type="aarch64v"/>
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<reg name="v24" bitsize="128" type="aarch64v"/>
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<reg name="v25" bitsize="128" type="aarch64v"/>
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<reg name="v26" bitsize="128" type="aarch64v"/>
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<reg name="v27" bitsize="128" type="aarch64v"/>
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<reg name="v28" bitsize="128" type="aarch64v"/>
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<reg name="v29" bitsize="128" type="aarch64v"/>
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<reg name="v30" bitsize="128" type="aarch64v"/>
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<reg name="v31" bitsize="128" type="aarch64v"/>
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<reg name="fpsr" bitsize="32"/>
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<reg name="fpcr" bitsize="32"/>
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</feature>
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</feature>
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</target>)";
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</target>)";
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@ -121,12 +197,12 @@ std::string GDBStubA64::RegRead(const Kernel::KThread* thread, size_t id) const
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return ValueToHex(context.pc);
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return ValueToHex(context.pc);
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} else if (id == PSTATE_REGISTER) {
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} else if (id == PSTATE_REGISTER) {
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return ValueToHex(context.pstate);
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return ValueToHex(context.pstate);
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} else if (id >= Q0_REGISTER && id < FPCR_REGISTER) {
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} else if (id >= Q0_REGISTER && id < FPSR_REGISTER) {
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return ValueToHex(fprs[id - Q0_REGISTER]);
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return ValueToHex(fprs[id - Q0_REGISTER]);
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} else if (id == FPCR_REGISTER) {
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return ValueToHex(context.fpcr);
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} else if (id == FPSR_REGISTER) {
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} else if (id == FPSR_REGISTER) {
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return ValueToHex(context.fpsr);
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return ValueToHex(context.fpsr);
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} else if (id == FPCR_REGISTER) {
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return ValueToHex(context.fpcr);
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} else {
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} else {
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return "";
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return "";
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}
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}
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@ -145,12 +221,12 @@ void GDBStubA64::RegWrite(Kernel::KThread* thread, size_t id, std::string_view v
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context.pc = HexToValue<u64>(value);
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context.pc = HexToValue<u64>(value);
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} else if (id == PSTATE_REGISTER) {
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} else if (id == PSTATE_REGISTER) {
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context.pstate = HexToValue<u32>(value);
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context.pstate = HexToValue<u32>(value);
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} else if (id >= Q0_REGISTER && id < FPCR_REGISTER) {
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} else if (id >= Q0_REGISTER && id < FPSR_REGISTER) {
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context.vector_registers[id - Q0_REGISTER] = HexToValue<u128>(value);
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context.vector_registers[id - Q0_REGISTER] = HexToValue<u128>(value);
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} else if (id == FPCR_REGISTER) {
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context.fpcr = HexToValue<u32>(value);
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} else if (id == FPSR_REGISTER) {
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} else if (id == FPSR_REGISTER) {
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context.fpsr = HexToValue<u32>(value);
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context.fpsr = HexToValue<u32>(value);
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} else if (id == FPCR_REGISTER) {
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context.fpcr = HexToValue<u32>(value);
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}
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}
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}
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}
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@ -195,6 +271,7 @@ std::string GDBStubA32::GetTargetXML() const {
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R"(<?xml version="1.0"?>
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R"(<?xml version="1.0"?>
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<!DOCTYPE target SYSTEM "gdb-target.dtd">
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<!DOCTYPE target SYSTEM "gdb-target.dtd">
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<target version="1.0">
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<target version="1.0">
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<architecture>arm</architecture>
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<feature name="org.gnu.gdb.arm.core">
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<feature name="org.gnu.gdb.arm.core">
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<reg name="r0" bitsize="32" type="uint32"/>
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<reg name="r0" bitsize="32" type="uint32"/>
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<reg name="r1" bitsize="32" type="uint32"/>
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<reg name="r1" bitsize="32" type="uint32"/>
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static constexpr u32 PC_REGISTER = 32;
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static constexpr u32 PC_REGISTER = 32;
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static constexpr u32 PSTATE_REGISTER = 33;
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static constexpr u32 PSTATE_REGISTER = 33;
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static constexpr u32 Q0_REGISTER = 34;
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static constexpr u32 Q0_REGISTER = 34;
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static constexpr u32 FPCR_REGISTER = 66;
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static constexpr u32 FPSR_REGISTER = 66;
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static constexpr u32 FPSR_REGISTER = 67;
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static constexpr u32 FPCR_REGISTER = 67;
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};
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};
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class GDBStubA32 final : public GDBStubArch {
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class GDBStubA32 final : public GDBStubArch {
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