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early-access version 2844

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pineappleEA 2022-07-18 00:57:52 +02:00
parent 28a4505835
commit 45cab1400c
9 changed files with 11 additions and 8 deletions
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2
README.md
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@ -1,7 +1,7 @@
yuzu emulator early access yuzu emulator early access
============= =============
This is the source code for early-access 2843. This is the source code for early-access 2844.
## Legal Notice ## Legal Notice

1
externals/dynarmic/.github/workflows/build-and-test.yml vendored
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@ -53,6 +53,7 @@ jobs:
env: env:
CC: gcc-10 CC: gcc-10
CXX: g++-10 CXX: g++-10
CXXFLAGS: -Wp,-D_GLIBCXX_ASSERTIONS
run: > run: >
cmake cmake
-B ${{github.workspace}}/build -B ${{github.workspace}}/build

2
externals/dynarmic/CMakeLists.txt vendored
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@ -1,5 +1,5 @@
cmake_minimum_required(VERSION 3.8) cmake_minimum_required(VERSION 3.8)
project(dynarmic LANGUAGES C CXX ASM VERSION 6.2.0) project(dynarmic LANGUAGES C CXX ASM VERSION 6.2.1)
# Determine if we're built as a subproject (using add_subdirectory) # Determine if we're built as a subproject (using add_subdirectory)
# or if this is the master project. # or if this is the master project.

2
externals/dynarmic/externals/oaknut/include/oaknut/oaknut.hpp vendored
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@ -1,6 +1,8 @@
// SPDX-FileCopyrightText: Copyright (c) 2022 merryhime <https://mary.rs> // SPDX-FileCopyrightText: Copyright (c) 2022 merryhime <https://mary.rs>
// SPDX-License-Identifier: MIT // SPDX-License-Identifier: MIT
#pragma once
#include <bit> #include <bit>
#include <cstddef> #include <cstddef>
#include <cstdint> #include <cstdint>

2
externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp vendored
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@ -508,7 +508,7 @@ void A64EmitX64::EmitA64ExceptionRaised(A64EmitContext& ctx, IR::Inst* inst) {
void A64EmitX64::EmitA64DataCacheOperationRaised(A64EmitContext& ctx, IR::Inst* inst) { void A64EmitX64::EmitA64DataCacheOperationRaised(A64EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ctx.reg_alloc.HostCall(nullptr, {}, args[0], args[1]); ctx.reg_alloc.HostCall(nullptr, {}, args[1], args[2]);
Devirtualize<&A64::UserCallbacks::DataCacheOperationRaised>(conf.callbacks).EmitCall(code); Devirtualize<&A64::UserCallbacks::DataCacheOperationRaised>(conf.callbacks).EmitCall(code);
} }

1
externals/dynarmic/src/dynarmic/backend/x64/stack_layout.h vendored
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@ -27,7 +27,6 @@ struct alignas(16) StackLayout {
u32 save_host_MXCSR; u32 save_host_MXCSR;
bool check_bit; bool check_bit;
bool halt_requested;
}; };
#ifdef _MSC_VER #ifdef _MSC_VER

2
externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.cpp vendored
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@ -55,7 +55,7 @@ void IREmitter::ExceptionRaised(Exception exception) {
} }
void IREmitter::DataCacheOperationRaised(DataCacheOperation op, const IR::U64& value) { void IREmitter::DataCacheOperationRaised(DataCacheOperation op, const IR::U64& value) {
Inst(Opcode::A64DataCacheOperationRaised, Imm64(static_cast<u64>(op)), value); Inst(Opcode::A64DataCacheOperationRaised, ImmCurrentLocationDescriptor(), Imm64(static_cast<u64>(op)), value);
} }
void IREmitter::InstructionCacheOperationRaised(InstructionCacheOperation op, const IR::U64& value) { void IREmitter::InstructionCacheOperationRaised(InstructionCacheOperation op, const IR::U64& value) {

2
externals/dynarmic/src/dynarmic/ir/opcodes.inc vendored
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@ -69,7 +69,7 @@ A64OPC(OrQC, Void, U1
A64OPC(SetPC, Void, U64 ) A64OPC(SetPC, Void, U64 )
A64OPC(CallSupervisor, Void, U32 ) A64OPC(CallSupervisor, Void, U32 )
A64OPC(ExceptionRaised, Void, U64, U64 ) A64OPC(ExceptionRaised, Void, U64, U64 )
A64OPC(DataCacheOperationRaised, Void, U64, U64 ) A64OPC(DataCacheOperationRaised, Void, U64, U64, U64 )
A64OPC(InstructionCacheOperationRaised, Void, U64, U64 ) A64OPC(InstructionCacheOperationRaised, Void, U64, U64 )
A64OPC(DataSynchronizationBarrier, Void, ) A64OPC(DataSynchronizationBarrier, Void, )
A64OPC(DataMemoryBarrier, Void, ) A64OPC(DataMemoryBarrier, Void, )

5
externals/dynarmic/src/dynarmic/ir/opt/a64_callback_config_pass.cpp vendored
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@ -22,13 +22,14 @@ void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf) {
continue; continue;
} }
const auto op = static_cast<A64::DataCacheOperation>(inst.GetArg(0).GetU64()); const auto op = static_cast<A64::DataCacheOperation>(inst.GetArg(1).GetU64());
if (op == A64::DataCacheOperation::ZeroByVA) { if (op == A64::DataCacheOperation::ZeroByVA) {
A64::IREmitter ir{block}; A64::IREmitter ir{block};
ir.current_location = A64::LocationDescriptor{IR::LocationDescriptor{inst.GetArg(0).GetU64()}};
ir.SetInsertionPoint(&inst); ir.SetInsertionPoint(&inst);
size_t bytes = 4 << static_cast<size_t>(conf.dczid_el0 & 0b1111); size_t bytes = 4 << static_cast<size_t>(conf.dczid_el0 & 0b1111);
IR::U64 addr{inst.GetArg(1)}; IR::U64 addr{inst.GetArg(2)};
const IR::U128 zero_u128 = ir.ZeroExtendToQuad(ir.Imm64(0)); const IR::U128 zero_u128 = ir.ZeroExtendToQuad(ir.Imm64(0));
while (bytes >= 16) { while (bytes >= 16) {