From 53406e55749e9c86f2cada0e9c786118e90dcccc Mon Sep 17 00:00:00 2001 From: pineappleEA Date: Mon, 3 Apr 2023 21:50:53 +0200 Subject: [PATCH] early-access version 3497 --- README.md | 2 +- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 23 +++-- src/core/hle/service/hid/controllers/npad.cpp | 6 +- src/video_core/engines/maxwell_3d.h | 8 +- src/video_core/texture_cache/image_info.cpp | 88 ++++++++++--------- src/video_core/texture_cache/image_info.h | 7 +- src/video_core/texture_cache/texture_cache.h | 4 +- 7 files changed, 69 insertions(+), 69 deletions(-) diff --git a/README.md b/README.md index 56778b37c..b4d1b204b 100755 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ yuzu emulator early access ============= -This is the source code for early-access 3493. +This is the source code for early-access 3497. ## Legal Notice diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index e6b499e64..eca801c08 100755 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -5,7 +5,6 @@ #include #include #include -#include #include "common/assert.h" #include "common/literals.h" #include "common/logging/log.h" @@ -410,21 +409,19 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) { } void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { - Dynarmic::A32::Context context; - jit.load()->SaveContext(context); - ctx.cpu_registers = context.Regs(); - ctx.extension_registers = context.ExtRegs(); - ctx.cpsr = context.Cpsr(); - ctx.fpscr = context.Fpscr(); + Dynarmic::A32::Jit* j = jit.load(); + ctx.cpu_registers = j->Regs(); + ctx.extension_registers = j->ExtRegs(); + ctx.cpsr = j->Cpsr(); + ctx.fpscr = j->Fpscr(); } void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { - Dynarmic::A32::Context context; - context.Regs() = ctx.cpu_registers; - context.ExtRegs() = ctx.extension_registers; - context.SetCpsr(ctx.cpsr); - context.SetFpscr(ctx.fpscr); - jit.load()->LoadContext(context); + Dynarmic::A32::Jit* j = jit.load(); + j->Regs() = ctx.cpu_registers; + j->ExtRegs() = ctx.extension_registers; + j->SetCpsr(ctx.cpsr); + j->SetFpscr(ctx.fpscr); } void ARM_Dynarmic_32::SignalInterrupt() { diff --git a/src/core/hle/service/hid/controllers/npad.cpp b/src/core/hle/service/hid/controllers/npad.cpp index 0efe4cfd4..bb7d2b0d6 100755 --- a/src/core/hle/service/hid/controllers/npad.cpp +++ b/src/core/hle/service/hid/controllers/npad.cpp @@ -70,7 +70,6 @@ Result Controller_NPad::VerifyValidSixAxisSensorHandle( const Core::HID::SixAxisSensorHandle& device_handle) { const auto npad_id = IsNpadIdValid(static_cast(device_handle.npad_id)); const bool device_index = device_handle.device_index < Core::HID::DeviceIndex::MaxDeviceIndex; - const bool npad_type = device_handle.npad_type < Core::HID::NpadStyleIndex::MaxNpadType; if (!npad_id) { return InvalidNpadId; @@ -78,10 +77,6 @@ Result Controller_NPad::VerifyValidSixAxisSensorHandle( if (!device_index) { return NpadDeviceIndexOutOfRange; } - // This doesn't get validated on nnsdk - if (!npad_type) { - return NpadInvalidHandle; - } return ResultSuccess; } @@ -1131,6 +1126,7 @@ Result Controller_NPad::DisconnectNpad(Core::HID::NpadIdType npad_id) { WriteEmptyEntry(shared_memory); return ResultSuccess; } + Result Controller_NPad::SetGyroscopeZeroDriftMode( const Core::HID::SixAxisSensorHandle& sixaxis_handle, Core::HID::GyroscopeZeroDriftMode drift_mode) { diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index c2e509287..488dfb018 100755 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -856,8 +856,8 @@ public: struct ZetaSize { enum class DimensionControl : u32 { - DepthDefinesArray = 0, - ArraySizeOne = 1, + DefineArraySize = 0, + ArraySizeIsOne = 1, }; u32 width; @@ -1104,8 +1104,8 @@ public: struct TileMode { enum class DimensionControl : u32 { - DepthDefinesArray = 0, - DepthDefinesDepth = 1, + DefineArraySize = 0, + DefineDepthSize = 1, }; union { BitField<0, 4, u32> block_width; diff --git a/src/video_core/texture_cache/image_info.cpp b/src/video_core/texture_cache/image_info.cpp index 9804a7f9a..ac674f0e7 100755 --- a/src/video_core/texture_cache/image_info.cpp +++ b/src/video_core/texture_cache/image_info.cpp @@ -14,6 +14,7 @@ namespace VideoCommon { +using Tegra::Engines::Fermi2D; using Tegra::Engines::Maxwell3D; using Tegra::Texture::TextureType; using Tegra::Texture::TICEntry; @@ -114,86 +115,89 @@ ImageInfo::ImageInfo(const TICEntry& config) noexcept { } } -ImageInfo::ImageInfo(const Maxwell3D::Regs& regs, size_t index) noexcept { - const auto& rt = regs.rt[index]; - format = VideoCore::Surface::PixelFormatFromRenderTargetFormat(rt.format); +ImageInfo::ImageInfo(const Maxwell3D::Regs::RenderTargetConfig& ct, + Tegra::Texture::MsaaMode msaa_mode) noexcept { + format = VideoCore::Surface::PixelFormatFromRenderTargetFormat(ct.format); rescaleable = false; - if (rt.tile_mode.is_pitch_linear) { - ASSERT(rt.tile_mode.dim_control == - Maxwell3D::Regs::TileMode::DimensionControl::DepthDefinesArray); + if (ct.tile_mode.is_pitch_linear) { + ASSERT(ct.tile_mode.dim_control == + Maxwell3D::Regs::TileMode::DimensionControl::DefineArraySize); type = ImageType::Linear; - pitch = rt.width; + pitch = ct.width; size = Extent3D{ .width = pitch / BytesPerBlock(format), - .height = rt.height, + .height = ct.height, .depth = 1, }; return; } - size.width = rt.width; - size.height = rt.height; - layer_stride = rt.array_pitch * 4; + size.width = ct.width; + size.height = ct.height; + layer_stride = ct.array_pitch * 4; maybe_unaligned_layer_stride = layer_stride; - num_samples = NumSamples(regs.anti_alias_samples_mode); + num_samples = NumSamples(msaa_mode); block = Extent3D{ - .width = rt.tile_mode.block_width, - .height = rt.tile_mode.block_height, - .depth = rt.tile_mode.block_depth, + .width = ct.tile_mode.block_width, + .height = ct.tile_mode.block_height, + .depth = ct.tile_mode.block_depth, }; - if (rt.tile_mode.dim_control == - Maxwell3D::Regs::TileMode::DimensionControl::DepthDefinesDepth) { + if (ct.tile_mode.dim_control == Maxwell3D::Regs::TileMode::DimensionControl::DefineDepthSize) { type = ImageType::e3D; - size.depth = rt.depth; + size.depth = ct.depth; } else { rescaleable = block.depth == 0; rescaleable &= size.height > 256; downscaleable = size.height > 512; type = ImageType::e2D; - resources.layers = rt.depth; + resources.layers = ct.depth; } } -ImageInfo::ImageInfo(const Tegra::Engines::Maxwell3D::Regs& regs) noexcept { - format = VideoCore::Surface::PixelFormatFromDepthFormat(regs.zeta.format); - size.width = regs.zeta_size.width; - size.height = regs.zeta_size.height; +ImageInfo::ImageInfo(const Maxwell3D::Regs::Zeta& zt, const Maxwell3D::Regs::ZetaSize& zt_size, + Tegra::Texture::MsaaMode msaa_mode) noexcept { + format = VideoCore::Surface::PixelFormatFromDepthFormat(zt.format); + size.width = zt_size.width; + size.height = zt_size.height; rescaleable = false; resources.levels = 1; - layer_stride = regs.zeta.array_pitch * 4; + layer_stride = zt.array_pitch * 4; maybe_unaligned_layer_stride = layer_stride; - num_samples = NumSamples(regs.anti_alias_samples_mode); + num_samples = NumSamples(msaa_mode); block = Extent3D{ - .width = regs.zeta.tile_mode.block_width, - .height = regs.zeta.tile_mode.block_height, - .depth = regs.zeta.tile_mode.block_depth, + .width = zt.tile_mode.block_width, + .height = zt.tile_mode.block_height, + .depth = zt.tile_mode.block_depth, }; - if (regs.zeta.tile_mode.is_pitch_linear) { - ASSERT(regs.zeta.tile_mode.dim_control == - Maxwell3D::Regs::TileMode::DimensionControl::DepthDefinesArray); + if (zt.tile_mode.is_pitch_linear) { + ASSERT(zt.tile_mode.dim_control == + Maxwell3D::Regs::TileMode::DimensionControl::DefineArraySize); type = ImageType::Linear; pitch = size.width * BytesPerBlock(format); - } else if (regs.zeta.tile_mode.dim_control == - Maxwell3D::Regs::TileMode::DimensionControl::DepthDefinesDepth) { - ASSERT(regs.zeta.tile_mode.is_pitch_linear == 0); - ASSERT(regs.zeta_size.dim_control == - Maxwell3D::Regs::ZetaSize::DimensionControl::ArraySizeOne); + } else if (zt.tile_mode.dim_control == + Maxwell3D::Regs::TileMode::DimensionControl::DefineDepthSize) { + ASSERT(zt_size.dim_control == Maxwell3D::Regs::ZetaSize::DimensionControl::ArraySizeIsOne); type = ImageType::e3D; - size.depth = regs.zeta_size.depth; + size.depth = zt_size.depth; } else { - ASSERT(regs.zeta_size.dim_control == - Maxwell3D::Regs::ZetaSize::DimensionControl::DepthDefinesArray); rescaleable = block.depth == 0; downscaleable = size.height > 512; type = ImageType::e2D; - resources.layers = regs.zeta_size.depth; + switch (zt_size.dim_control) { + case Maxwell3D::Regs::ZetaSize::DimensionControl::DefineArraySize: + resources.layers = zt_size.depth; + break; + case Maxwell3D::Regs::ZetaSize::DimensionControl::ArraySizeIsOne: + resources.layers = 1; + break; + } } } -ImageInfo::ImageInfo(const Tegra::Engines::Fermi2D::Surface& config) noexcept { +ImageInfo::ImageInfo(const Fermi2D::Surface& config) noexcept { UNIMPLEMENTED_IF_MSG(config.layer != 0, "Surface layer is not zero"); format = VideoCore::Surface::PixelFormatFromRenderTargetFormat(config.format); rescaleable = false; - if (config.linear == Tegra::Engines::Fermi2D::MemoryLayout::Pitch) { + if (config.linear == Fermi2D::MemoryLayout::Pitch) { type = ImageType::Linear; size = Extent3D{ .width = config.pitch / VideoCore::Surface::BytesPerBlock(format), diff --git a/src/video_core/texture_cache/image_info.h b/src/video_core/texture_cache/image_info.h index 290b27378..eca3b313c 100755 --- a/src/video_core/texture_cache/image_info.h +++ b/src/video_core/texture_cache/image_info.h @@ -17,8 +17,11 @@ using VideoCore::Surface::PixelFormat; struct ImageInfo { ImageInfo() = default; explicit ImageInfo(const TICEntry& config) noexcept; - explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs& regs, size_t index) noexcept; - explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs& regs) noexcept; + explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& ct, + Tegra::Texture::MsaaMode msaa_mode) noexcept; + explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs::Zeta& zt, + const Tegra::Engines::Maxwell3D::Regs::ZetaSize& zt_size, + Tegra::Texture::MsaaMode msaa_mode) noexcept; explicit ImageInfo(const Tegra::Engines::Fermi2D::Surface& config) noexcept; explicit ImageInfo(const Tegra::DMA::ImageOperand& config) noexcept; diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h index d0d8bb421..1a92c8dec 100755 --- a/src/video_core/texture_cache/texture_cache.h +++ b/src/video_core/texture_cache/texture_cache.h @@ -1503,7 +1503,7 @@ ImageViewId TextureCache

::FindColorBuffer(size_t index, bool is_clear) { if (rt.format == Tegra::RenderTargetFormat::NONE) { return ImageViewId{}; } - const ImageInfo info(regs, index); + const ImageInfo info(regs.rt[index], regs.anti_alias_samples_mode); return FindRenderTargetView(info, gpu_addr, is_clear); } @@ -1517,7 +1517,7 @@ ImageViewId TextureCache

::FindDepthBuffer(bool is_clear) { if (gpu_addr == 0) { return ImageViewId{}; } - const ImageInfo info(regs); + const ImageInfo info(regs.zeta, regs.zeta_size, regs.anti_alias_samples_mode); return FindRenderTargetView(info, gpu_addr, is_clear); }