271 lines
9.5 KiB
ArmAsm
Executable file
271 lines
9.5 KiB
ArmAsm
Executable file
/*
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* ARM NEON optimised Float DSP functions
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* Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#include "asm.S"
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function ff_vector_fmul_neon, export=1
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subs r3, r3, #8
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vld1.32 {d0-d3}, [r1,:128]!
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vld1.32 {d4-d7}, [r2,:128]!
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vmul.f32 q8, q0, q2
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vmul.f32 q9, q1, q3
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beq 3f
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bics ip, r3, #15
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beq 2f
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1: subs ip, ip, #16
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vld1.32 {d0-d1}, [r1,:128]!
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vld1.32 {d4-d5}, [r2,:128]!
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vmul.f32 q10, q0, q2
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vld1.32 {d2-d3}, [r1,:128]!
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vld1.32 {d6-d7}, [r2,:128]!
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vmul.f32 q11, q1, q3
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vst1.32 {d16-d19},[r0,:128]!
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vld1.32 {d0-d1}, [r1,:128]!
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vld1.32 {d4-d5}, [r2,:128]!
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vmul.f32 q8, q0, q2
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vld1.32 {d2-d3}, [r1,:128]!
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vld1.32 {d6-d7}, [r2,:128]!
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vmul.f32 q9, q1, q3
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vst1.32 {d20-d23},[r0,:128]!
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bne 1b
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ands r3, r3, #15
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beq 3f
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2: vld1.32 {d0-d1}, [r1,:128]!
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vld1.32 {d4-d5}, [r2,:128]!
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vst1.32 {d16-d17},[r0,:128]!
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vmul.f32 q8, q0, q2
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vld1.32 {d2-d3}, [r1,:128]!
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vld1.32 {d6-d7}, [r2,:128]!
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vst1.32 {d18-d19},[r0,:128]!
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vmul.f32 q9, q1, q3
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3: vst1.32 {d16-d19},[r0,:128]!
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bx lr
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endfunc
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function ff_vector_fmac_scalar_neon, export=1
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VFP len .req r2
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VFP acc .req r3
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NOVFP len .req r3
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NOVFP acc .req r2
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VFP vdup.32 q15, d0[0]
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NOVFP vdup.32 q15, r2
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bics r12, len, #15
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mov acc, r0
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beq 3f
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vld1.32 {q0}, [r1,:128]!
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vld1.32 {q8}, [acc,:128]!
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vld1.32 {q1}, [r1,:128]!
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vld1.32 {q9}, [acc,:128]!
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1: vmla.f32 q8, q0, q15
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vld1.32 {q2}, [r1,:128]!
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vld1.32 {q10}, [acc,:128]!
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vmla.f32 q9, q1, q15
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vld1.32 {q3}, [r1,:128]!
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vld1.32 {q11}, [acc,:128]!
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vmla.f32 q10, q2, q15
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vst1.32 {q8}, [r0,:128]!
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vmla.f32 q11, q3, q15
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vst1.32 {q9}, [r0,:128]!
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subs r12, r12, #16
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beq 2f
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vld1.32 {q0}, [r1,:128]!
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vld1.32 {q8}, [acc,:128]!
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vst1.32 {q10}, [r0,:128]!
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vld1.32 {q1}, [r1,:128]!
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vld1.32 {q9}, [acc,:128]!
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vst1.32 {q11}, [r0,:128]!
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b 1b
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2: vst1.32 {q10}, [r0,:128]!
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vst1.32 {q11}, [r0,:128]!
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ands len, len, #15
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it eq
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bxeq lr
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3: vld1.32 {q0}, [r1,:128]!
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vld1.32 {q8}, [acc,:128]!
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vmla.f32 q8, q0, q15
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vst1.32 {q8}, [r0,:128]!
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subs len, len, #4
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bgt 3b
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bx lr
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.unreq len
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endfunc
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function ff_vector_fmul_scalar_neon, export=1
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VFP len .req r2
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NOVFP len .req r3
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VFP vdup.32 q8, d0[0]
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NOVFP vdup.32 q8, r2
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bics r12, len, #15
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beq 3f
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vld1.32 {q0},[r1,:128]!
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vld1.32 {q1},[r1,:128]!
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1: vmul.f32 q0, q0, q8
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vld1.32 {q2},[r1,:128]!
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vmul.f32 q1, q1, q8
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vld1.32 {q3},[r1,:128]!
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vmul.f32 q2, q2, q8
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vst1.32 {q0},[r0,:128]!
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vmul.f32 q3, q3, q8
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vst1.32 {q1},[r0,:128]!
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subs r12, r12, #16
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beq 2f
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vld1.32 {q0},[r1,:128]!
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vst1.32 {q2},[r0,:128]!
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vld1.32 {q1},[r1,:128]!
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vst1.32 {q3},[r0,:128]!
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b 1b
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2: vst1.32 {q2},[r0,:128]!
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vst1.32 {q3},[r0,:128]!
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ands len, len, #15
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it eq
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bxeq lr
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3: vld1.32 {q0},[r1,:128]!
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vmul.f32 q0, q0, q8
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vst1.32 {q0},[r0,:128]!
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subs len, len, #4
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bgt 3b
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bx lr
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.unreq len
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endfunc
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function ff_vector_fmul_window_neon, export=1
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push {r4,r5,lr}
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ldr lr, [sp, #12]
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sub r2, r2, #8
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sub r5, lr, #2
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add r2, r2, r5, lsl #2
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add r4, r3, r5, lsl #3
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add ip, r0, r5, lsl #3
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mov r5, #-16
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vld1.32 {d0,d1}, [r1,:128]!
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vld1.32 {d2,d3}, [r2,:128], r5
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vld1.32 {d4,d5}, [r3,:128]!
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vld1.32 {d6,d7}, [r4,:128], r5
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1: subs lr, lr, #4
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vmul.f32 d22, d0, d4
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vrev64.32 q3, q3
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vmul.f32 d23, d1, d5
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vrev64.32 q1, q1
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vmul.f32 d20, d0, d7
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vmul.f32 d21, d1, d6
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beq 2f
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vmla.f32 d22, d3, d7
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vld1.32 {d0,d1}, [r1,:128]!
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vmla.f32 d23, d2, d6
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vld1.32 {d18,d19},[r2,:128], r5
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vmls.f32 d20, d3, d4
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vld1.32 {d24,d25},[r3,:128]!
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vmls.f32 d21, d2, d5
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vld1.32 {d6,d7}, [r4,:128], r5
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vmov q1, q9
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vrev64.32 q11, q11
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vmov q2, q12
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vswp d22, d23
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vst1.32 {d20,d21},[r0,:128]!
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vst1.32 {d22,d23},[ip,:128], r5
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b 1b
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2: vmla.f32 d22, d3, d7
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vmla.f32 d23, d2, d6
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vmls.f32 d20, d3, d4
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vmls.f32 d21, d2, d5
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vrev64.32 q11, q11
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vswp d22, d23
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vst1.32 {d20,d21},[r0,:128]!
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vst1.32 {d22,d23},[ip,:128], r5
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pop {r4,r5,pc}
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endfunc
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function ff_vector_fmul_add_neon, export=1
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ldr r12, [sp]
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vld1.32 {q0-q1}, [r1,:128]!
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vld1.32 {q8-q9}, [r2,:128]!
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vld1.32 {q2-q3}, [r3,:128]!
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vmul.f32 q10, q0, q8
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vmul.f32 q11, q1, q9
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1: vadd.f32 q12, q2, q10
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vadd.f32 q13, q3, q11
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pld [r1, #16]
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pld [r2, #16]
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pld [r3, #16]
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subs r12, r12, #8
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beq 2f
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vld1.32 {q0}, [r1,:128]!
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vld1.32 {q8}, [r2,:128]!
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vmul.f32 q10, q0, q8
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vld1.32 {q1}, [r1,:128]!
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vld1.32 {q9}, [r2,:128]!
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vmul.f32 q11, q1, q9
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vld1.32 {q2-q3}, [r3,:128]!
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vst1.32 {q12-q13},[r0,:128]!
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b 1b
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2: vst1.32 {q12-q13},[r0,:128]!
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bx lr
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endfunc
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function ff_vector_fmul_reverse_neon, export=1
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add r2, r2, r3, lsl #2
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sub r2, r2, #32
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mov r12, #-32
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vld1.32 {q0-q1}, [r1,:128]!
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vld1.32 {q2-q3}, [r2,:128], r12
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1: pld [r1, #32]
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vrev64.32 q3, q3
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vmul.f32 d16, d0, d7
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vmul.f32 d17, d1, d6
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pld [r2, #-32]
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vrev64.32 q2, q2
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vmul.f32 d18, d2, d5
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vmul.f32 d19, d3, d4
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subs r3, r3, #8
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beq 2f
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vld1.32 {q0-q1}, [r1,:128]!
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vld1.32 {q2-q3}, [r2,:128], r12
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vst1.32 {q8-q9}, [r0,:128]!
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b 1b
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2: vst1.32 {q8-q9}, [r0,:128]!
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bx lr
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endfunc
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function ff_butterflies_float_neon, export=1
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1: vld1.32 {q0},[r0,:128]
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vld1.32 {q1},[r1,:128]
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vsub.f32 q2, q0, q1
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vadd.f32 q1, q0, q1
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vst1.32 {q2},[r1,:128]!
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vst1.32 {q1},[r0,:128]!
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subs r2, r2, #4
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bgt 1b
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bx lr
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endfunc
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function ff_scalarproduct_float_neon, export=1
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vmov.f32 q2, #0.0
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1: vld1.32 {q0},[r0,:128]!
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vld1.32 {q1},[r1,:128]!
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vmla.f32 q2, q0, q1
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subs r2, r2, #4
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bgt 1b
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vadd.f32 d0, d4, d5
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vpadd.f32 d0, d0, d0
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NOVFP vmov.32 r0, d0[0]
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bx lr
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endfunc
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